1. Field of the Invention
The present invention relates to a frequency conversion circuit which can obtain a constant output voltage regardless of a change in temperature or process, can enhance a linearity and conversion gain, and can secure a low-noise characteristic.
2. Description of the Related Art
Frequency conversion circuits serve to cause information with an arbitrary frequency to transit into another frequency band and are widely utilized in various communication equipments, for example, a transmitting/receiving system for communication and the like.
The frequency conversion circuit can be divided into an active frequency conversion circuit and a passive frequency conversion circuit, depending on a topology. Between them, the active frequency conversion circuit has a gain and is subdivided into a single-balanced frequency conversion circuit and a double-balanced frequency conversion circuit, depending on an implementing method.
FIG. 1A is a circuit diagram of the single-balanced frequency conversion circuit, and FIG. 1B is a circuit diagram of the double-balanced frequency conversion circuit.
As shown in FIG. 1A, the single-balanced frequency conversion circuit includes an input transistor M1 and two switching transistors M2 and M3.
A gate electrode of the input transistor M1, serving as a control input electrode, receives a predetermined frequency of RF (Radio Frequency) signal. In this case, the RF signal applied to the gate electrode of the input transistor M1 is a substantial signal source. The single-balanced frequency conversion circuit causes the signal source to transit to another frequency band (for example, an intermediate frequency signal (hereinafter, referred to ‘IF signal’)).
The drain of the input transistor M1 is connected in parallel to the sources of the switching transistors M2 and M3, and the gates of the switching transistors M2 and M3 receive a sine-wave signal (hereinafter, referred to ‘LO signal’) of a local oscillator. In this case, when any one of the switching transistors M2 and M3 receives an LO signal LO+, the other receives an LO signal LO−. Therefore, the switching transistors M2 and M3 are configured to be reversely driven.
The input transistor M1 provides a current corresponding to a voltage of the RF signal applied to the gate thereof, but the switching transistors M2 and M3 are turned on/off by the LO signal. Therefore, an IF signal which has transited by the frequency of the LO signal is provided to output stages IF+ and IF−. At this time, as the IF signal is differentially selected, the RF signal can be eliminated, but the LO signal is not eliminated.
The double-balanced frequency conversion circuit has been implemented to solve such problems. As shown in FIG. 1B, the double-balanced frequency conversion circuit includes one constant current source ISS connected to two input transistors M1 and M2 forming one differential pair.
The gates of the input transistors M1 and M2 receive predetermined frequencies of RF signals RF+ and RF−, and the input transistors M1 and M2 are connected to a switching circuit 10.
As shown in FIG. 1B, the switching circuit 10 includes a plurality of switching transistors M3 to M6. The transistors M3 and M4 form a pair, and the transistors M5 and M6 form a pair. The gates of the transistors M3 and M6 receive an LO signal LO+, and the gates of the transistors M4 and M5 receive an LO signal LO−.
The sources of the transistors M3 and M4 are connected to the drain of the input transistor M1, and the sources of the transistors M5 and M6 are connected to the drain of the input transistor M2. The drains of the switching transistors M3 and M6 are connected to a power supply VDD through resistors RL, and the drains of the switching transistors M4 and M5 are connected to the drains of the switching transistors M6 and M3 forming another pair, respectively.
The double-balanced frequency conversion circuit configured in such a manner is driven in accordance with the same operation principle as the single-balanced frequency conversion circuit of FIG. 1A. However, currents provided to the output stages IF+ and IF−, respectively, have a phase difference of 180 degrees. Therefore, as the currents are added up, the frequencies of the LO signals LO+ and LO− and the RF signals RF+ and RF− at the output stages IF+ and IF− are offset and eliminated.
The above-described operation of the frequency conversion circuit is based on the triangulation of Equation 1, and the RF signal and the LO signal applied to the frequency conversion circuit and the IF signal output from the frequency conversion circuit can be expressed by Equations 2 to 4.
                                          (                          A              ⁢                                                          ⁢              cos              ⁢                                                          ⁢                              ω                1                            ⁢              t                        )                    ⁢                      (                          B              ⁢                                                          ⁢              cos              ⁢                                                          ⁢                              ω                2                            ⁢              t                        )                          =                                            A              ⁢                                                          ⁢              B                        2                    ⁡                      [                                                            cos                  ⁡                                      (                                                                  ω                        1                                            +                                              ω                        2                                                              )                                                  ⁢                t                            +                                                cos                  ⁡                                      (                                                                  ω                        1                                            -                                              ω                        2                                                              )                                                  ⁢                t                                      ]                                              [                  Equation          ⁢                                          ⁢          1                ]                                          R          ⁢                                          ⁢                      F            ⁡                          (              t              )                                      =                              V                          R              ⁢                                                          ⁢              F                                ⁢                      cos            ⁡                          (                                                ω                                                                                                    ⁢                    RF                                                  ⁢                t                            )                                                          [                  Equation          ⁢                                          ⁢          2                ]                                          LO          ⁡                      (            t            )                          =                              1            2                    +                                    2              π                        [                                          sin                ⁡                                  (                                                            ω                      LO                                        ⁢                    t                                    )                                            +                                                1                  3                                ⁢                                  sin                  ⁡                                      (                                          3                      ⁢                                              ω                        LO                                            ⁢                      t                                        )                                                              +              …                        ⁢                                                  ]                    -                      1            2                    +                                    2              π                        [                                          sin                ⁡                                  (                                                            ω                      LO                                        ⁢                    t                                    )                                            +                                                1                  3                                ⁢                                  sin                  ⁡                                      (                                          3                      ⁢                                              ω                        LO                                            ⁢                      t                                        )                                                              +              …                        ⁢                                                  ]                                              [                  Equation          ⁢                                          ⁢          3                ]                                          IF          ⁡                      (            t            )                          =                              A            ⁢                                                  ⁢                          V              RF                        ⁢                          cos              ⁡                              (                                                      ω                    RF                                    ⁢                  t                                )                                      ⁢                                          4                π                            [                                                sin                  ⁡                                      (                                                                  ω                        LO                                            ⁢                      t                                        )                                                  +                                                      1                    3                                    ⁢                                      sin                    ⁡                                          (                                              3                        ⁢                                                  ω                          LO                                                ⁢                        t                                            )                                                                      +                                                      1                    5                                    ⁢                                      sin                    ⁡                                          (                                              5                        ⁢                                                  ω                          LO                                                ⁢                        t                                            )                                                                      +                …                            ⁢                                                          ]                                =                                                    2                ⁢                A                ⁢                                                                  ⁢                                  V                  RF                                            π                        ⁡                          [                                                                    sin                    ⁡                                          (                                                                        ω                          RF                                                +                                                  ω                          LO                                                                    )                                                        ⁢                  t                                -                                                      sin                    ⁡                                          (                                                                        ω                          RF                                                -                                                  ω                          LO                                                                    )                                                        ⁢                  t                                            ]                                                          [                  Equation          ⁢                                          ⁢          4                ]            
Here, A represents a gain of the frequency conversion circuit, VRF represents the magnitude of an RF signal, ωRF represents the frequency of an RF signal, and ωLO represents the frequency of an LO signal.
However, when the frequency conversion circuit is actually implemented, a sine wave is used in an LO signal, instead of a square wave. This is because, when a square wave is used, noise occurs due to a rapid switching operation. Therefore, a sine wave having a similar shape is used at a high frequency.
FIG. 2 is a diagram showing the structure of a receiver using a direct conversion receiver (DCR) scheme. FIG. 3 is a diagram simply showing a portion related to a frequency conversion circuit in the structure of FIG. 2.
As shown in FIG. 3, an Intermediate Frequency signal is omitted in such a DCR scheme compared to heterodyne receiver. Therefore, the structure of the receiver is simplified, as shown in FIG. 2. Accordingly, system-on-chip can be realized, and a cost is reduced. However, a signal loss can be caused by oscillation or the like, and a burden of the frequency conversion circuit becomes so large that a DC offset can occur.
That is, a signal of which the frequency is converted by the frequency conversion circuit (down mixer) shown in FIG. 2 has a center frequency of 0 Hz. At this time, a DC offset is at the center of the signal, causing the signal to be distorted.
Further, since the magnitude of the DC offset is much larger than that of a desired signal, the DC offset may saturate the structure positioned next to the frequency conversion circuit, that is, a structure for processing a baseband signal. Accordingly, the baseband signal is significantly influenced.
To eliminate the DC offset which causes such a problem, a frequency conversion circuit using a common mode feedback circuit has been used in the related art. This is because, since most outputs of a frequency conversion circuit used in the DCR scheme are low-frequency signals, a coupling capacitor blocking a DC component from an RF signal cannot be used. Therefore, the common mode feedback circuit for feeding back a DC voltage has been used in the related art.
FIGS. 4A to 4B show a general common mode feedback circuit. FIG. 4A is a diagram showing a conceptual structure of a general common mode feedback circuit, FIG. 4B is a circuit diagram of the common mode feed back circuit, and FIG. 4C is a diagram showing an output waveform of the common mode feedback circuit.
As shown in FIG. 4A, the basic concept of the general common mode feedback circuit is where a voltage VCM of a signal which is output with a converted frequency is detected and is then compared with a preset reference voltage, the output voltage VCM is adjusted to be equalized to the reference voltage, and the adjusted voltage is fed back.
As shown in FIG. 4C, it can be found that the waveform of a voltage output from the common mode feedback circuit is maintained constantly regardless of a change in temperature or process.
FIG. 5 is a circuit diagram of a conventional frequency conversion circuit. As shown in FIG. 5, the conventional frequency conversion circuit includes an input stage 51, a frequency conversion stage 52, a common mode feedback circuit 53, and a load stage 54.
The input stage 51 composed of transistors M1 and M2 outputs currents corresponding to voltage-type RF signals RF+ and RF− which are input to the gates of the transistors M1 and M2.
The frequency conversion stage 52 includes a plurality of switching transistors M3 to M6 and resistors RL. The frequency conversion stage 52 receives LO signals LO+ and LO−, causes the output RF signals RF+ and RF− to transit by the frequencies of the LO signals LO+ and LO− so as to output IF signals IF+ and IF−, and detects output voltages of the IF signals IF+ and IF−.
The common mode feedback circuit 53 compares an output voltage VCM provided from the frequency conversion stage 52 with a preset reference voltage Vref so as to adjust the output voltage VCM such that the output voltage VCM is equalized to the reference voltage Vref. Then, the common mode feedback circuit 53 directly feeds the adjusted output voltage VCM back to the load stage 54.
The load stage 54 is implemented by PMOS transistors P1 to P4 and supplies a current I to the frequency conversion stage 52 through the PMOS transistors P1 to P4.
Since the load stage 54 is implemented by the PMOS transistors P1 to P4 as active elements, a bias voltage should be constantly adjusted so that the active elements operate in an operation region. The bias voltage is adjusted by the voltage VCMfeedback which is directly fed back from the common mode feedback circuit 53.
However, as the load stage of the conventional frequency conversion circuit is implemented by the PMOS transistors as active elements, a low-noise characteristic is significantly degraded, because of flicker noise which rapidly increases in the active elements.